Artificial Intelligence on Chip Workshop
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1 – 2 April 2026
- Faculty of Electrical Engineering and Communication, Brno University of Technology (BUT), Technická 10, Brno, Czechia
Join us for the Artificial Intelligence on Chip Workshop, a two-day event bringing together leading researchers and industry experts to explore the intersection of AI and semiconductor design. The program highlights secure and reliable embedded systems, AI-driven physical design automation, custom silicon for AI workloads, multi-agent large language models, and real-world edge AI deployments in energy and industrial applications. In addition to expert talks and networking opportunities, participants can look forward to an excursion to Mycroft Mind, Ltd., a sightseeing tour around Brno city center, and a screening of A Chip Odyssey.
Date: April 1–2, 2026 (Wednesday and Thursday)
Location: Brno, Czech Republic
The event will be held in English and is free of charge. Wednesday lectures will also be streamed online. The event is open to the public, but registration is required.
Speakers and Topics
Prof. Hana Kubátová and Dr. Martin Novotný (Czech Technical University in Prague)
Safe and Secure Digital Design: Challenges and Open Problems
This talk addresses current challenges in embedded and cyber-physical systems. These systems combine hardware and software, are often reconfigurable, and must interact with the physical world, where behavior can appear analog. At the same time, connectivity is pervasive, systems are continuously online, and network traffic is increasingly encrypted.
The rapid growth of open-source software, open instruction set architectures (e.g., RISC-V), and the ubiquitous adoption of AI expands the attack surface and design complexity. Embedded systems are deployed across domains, including automotive and other safety- and mission-critical applications. The presentation highlights the interplay between security (resistance to attacks) and fault tolerance, and discusses emerging approaches for more accurate reliability characterization using more realistic reliability models.
Dr. Allen Cheng (Light Momentum Technology Corp., Taiwan)
Practical Applications of AI and Customized Chips in Edge Computing Scenarios
This lecture explores real-world deployments of artificial intelligence in edge computing, focusing on how customized semiconductor solutions—from AI accelerators to domain-specific SoCs—enable new levels of performance and energy efficiency.
Assoc. Prof. Andy Yu-Guang Chen (National Central University)
AI-Driven Early Routing, DRC Prediction, and Congestion-Aware Pin Assignment for Faster Physical Design Closure
Modern integrated circuit (IC) design faces mounting challenges from increasing layout complexity, stringent design rules, and ever-tighter schedules. Routing congestion and design rule violations (DRVs) discovered late in the flow often trigger costly, time-consuming iterations.
This talk presents recent advances in applying machine learning early in physical design. Ensemble learning and CNN-based frameworks are introduced for predicting routing demand and detailed-routing-level DRV maps from early placement and global routing data, enabling accurate congestion and violation detection at a fraction of traditional runtime. The talk also introduces COPA, a congestion-oriented pin-assignment method that optimizes feedthrough pin placement to mitigate intra-block routing bottlenecks without increasing wirelength. Together, these data-driven techniques act as lightweight add-ons to existing design flows, reducing design iterations and accelerating closure.
Dr. G. R. Chen (Light Momentum Technology Corp.)
Accelerating the Future: Custom Silicon for AI Workloads
As AI expands across domains—from cloud computing to mobile augmented reality—the demand for customized semiconductor solutions continues to grow. This talk explores architectural foundations and design strategies for AI-specific chip design, emphasizing how neural network characteristics such as sparsity, precision scaling, and dataflow shape hardware implementations.
It covers accelerator paradigms for CNN and transformer workloads and discusses optimization techniques including quantization, pruning, and mixed-precision computation. A case study highlights practical approaches to AI SoC design, focusing on compute efficiency and workload-aware architecture. The talk also surveys trends such as 3D integration, AI-assisted hardware generation, and sustainability-driven design.
Prof. Radim Burget (Brno University of Technology)
Collaborative Problem-Solving Using Large Language Models
This lecture examines the shift from monolithic, opaque AI models toward explainable and scientifically robust AI systems, with a focus on multi-agent large language model (LLM) architectures. It highlights how distributing reasoning, verification, and evidence evaluation across cooperating agents can enable more transparent and reproducible conclusions.
The lecture briefly discusses hardware implications, including increased demands on memory, parallelism, and inter-agent communication, underscoring the tight coupling between explainable multi-agent AI and modern computing architectures.
Ing. Jan Remeš (Mycroft Mind, Ltd., Brno)
Semiconductors at the Grid Edge: Case Studies in PV Forecasting and Smart Meter Intelligence
This session explores practical deployments of embedded AI in the energy sector, showcasing how Mycroft Mind bridges the gap between advanced algorithms and resource-constrained hardware under the IPCEI ME/CT framework.
Through the “SkyEye” case study, the session demonstrates high-precision PV production forecasting using sky imagers and hardware-accelerated ConvLSTM models for real-time edge processing. It also presents a “Consumption Predictor” solution for smart meter intelligence, emphasizing that efficient AI extends beyond LLMs by leveraging incremental learning and optimized mathematical models that operate within strict memory and performance limits of industrial semiconductors.
Schedule
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Faculty of Electrical Engineering and Communication, BUT, Technická 10, Brno, Czechia & Online
April 1, 2026 (Wednesday)
8:30–9:15
Registration and welcome refreshment
9:15–9:30
Welcome remarks (Assoc. Prof. Háze)
9:30–10:30
Dr. Allen Cheng
10:30–11:30
Assoc. Prof. Andy Yu-Guang Chen
11:30–12:30
Prof. Hana Kubátová and Dr. Martin Novotný
12:30–13:30
Lunch
13:30–14:30
Dr. G. R. Chen
14:30–15:15
Prof. Radim Burget
15:15–16:00
Dr. Tomáš Bort
16:00–17:30
Networking dinner
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Location TBA
April 2, 2026 (Thursday)
9:30–11:00
Excursion to Mycroft Mind, Ltd.
12:00–13:30
Lunch
15:00–17:00
Sightseeing tour around Brno city center
17:00–17:45
Transfer to Lucerna Cinema (Minská 19, 616 00 Brno-Žabovřesky)
18:00–20:00
Screening of “A Chip Odyssey”
20:00–21:30
Reception and networking
This workshop is organised in the frame of The Advanced Chip Design Research Center (ACDRC), which aims to foster innovation and collaboration in semiconductor research and education between Taiwan and the Czech Republic. ACDRC is established under the Taiwan-Czech Democratic Partners Supply Chain Resilience and Capacity Building Cooperation Plan for 2022-2026. The center is dedicated to cultivating integrated circuit design talent across various fields and fostering the development of the semiconductor industry ecosystem in the Czech Republic.
You can find recordings of ACDRC workshops on our Youtube channel.
This project is a collaborative effort between Taiwanese and Czech organizations, specifically NIAR and CyberSecurityHubcz, which serves as the main execution unit, complemented by a consortium that includes the Czech Technical University, Masaryk University and Brno University of Technology.
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