In early April, the Artificial Intelligence on Chip workshop brought leading researchers and experts from the Czech Republic and Taiwan to Brno, as well as those interested in current developments in the fields of artificial intelligence and semiconductor design. The two-day program offered a diverse overview of this rapidly evolving field, which is having a profound impact on the future of modern technology.
The technical presentations focused, for example, on secure and reliable embedded systems, the automation of physical chip design using artificial intelligence, and the development of custom silicon solutions for AI applications. Topics such as multi-agent large language models and the practical application of artificial intelligence in the energy sector and industry—where its growing importance is becoming evident—also drew significant attention.
In addition to the technical program, participants had the opportunity to network and share experiences across both the academic and industrial sectors. The accompanying program included a tour of Mycroft Mind and a screening of the film A Chip Odyssey at the Lucerna Cinema, which provided a broader context for the development of semiconductor technologies.
The event was conducted in English, and Wednesday’s lecture block was also available online. The workshop confirmed that the intersection of artificial intelligence and chip design is not only a current topic but one of the key directions that will set the pace of technological development in the coming years.
This lecture explores real-world deployments of artificial intelligence in edge computing, focusing on how customized semiconductor solutions—from AI accelerators to domain-specific SoCs—enable new levels of performance and energy efficiency.
Modern integrated circuit (IC) design faces mounting challenges from increasing layout complexity, stringent design rules, and ever-tighter schedules. Routing congestion and design rule violations (DRVs) discovered late in the flow often trigger costly, time-consuming iterations.
This talk presents recent advances in applying machine learning early in physical design. Ensemble learning and CNN-based frameworks are introduced for predicting routing demand and detailed-routing-level DRV maps from early placement and global routing data, enabling accurate congestion and violation detection at a fraction of traditional runtime. The talk also introduces COPA, a congestion-oriented pin-assignment method that optimizes feedthrough pin placement to mitigate intra-block routing bottlenecks without increasing wirelength. Together, these data-driven techniques act as lightweight add-ons to existing design flows, reducing design iterations and accelerating closure.
This talk addresses current challenges in embedded and cyber-physical systems. These systems combine hardware and software, are often reconfigurable, and must interact with the physical world, where behavior can appear analog. At the same time, connectivity is pervasive, systems are continuously online, and network traffic is increasingly encrypted.
The rapid growth of open-source software, open instruction set architectures (e.g., RISC-V), and the ubiquitous adoption of AI expands the attack surface and design complexity. Embedded systems are deployed across domains, including automotive and other safety- and mission-critical applications. The presentation highlights the interplay between security (resistance to attacks) and fault tolerance, and discusses emerging approaches for more accurate reliability characterization using more realistic reliability models.
As AI expands across domains—from cloud computing to mobile augmented reality—the demand for customized semiconductor solutions continues to grow. This talk explores architectural foundations and design strategies for AI-specific chip design, emphasizing how neural network characteristics such as sparsity, precision scaling, and dataflow shape hardware implementations.
It covers accelerator paradigms for CNN and transformer workloads and discusses optimization techniques including quantization, pruning, and mixed-precision computation. A case study highlights practical approaches to AI SoC design, focusing on compute efficiency and workload-aware architecture. The talk also surveys trends such as 3D integration, AI-assisted hardware generation, and sustainability-driven design.
This lecture examines the shift from monolithic, opaque AI models toward explainable and scientifically robust AI systems, with a focus on multi-agent large language model (LLM) architectures. It highlights how distributing reasoning, verification, and evidence evaluation across cooperating agents can enable more transparent and reproducible conclusions.
The lecture briefly discusses hardware implications, including increased demands on memory, parallelism, and inter-agent communication, underscoring the tight coupling between explainable multi-agent AI and modern computing architectures.
This session explores practical deployments of embedded AI in the energy sector, showcasing how Mycroft Mind bridges the gap between advanced algorithms and resource-constrained hardware under the IPCEI ME/CT framework.
Through the “SkyEye” case study, the session demonstrates high-precision PV production forecasting using sky imagers and hardware-accelerated ConvLSTM models for real-time edge processing. It also presents a “Consumption Predictor” solution for smart meter intelligence, emphasizing that efficient AI extends beyond LLMs by leveraging incremental learning and optimized mathematical models that operate within strict memory and performance limits of industrial semiconductors.
This workshop was organised in the frame of The Advanced Chip Design Research Center (ACDRC), which aims to foster innovation and collaboration in semiconductor research and education between Taiwan and the Czech Republic. ACDRC is established under the Taiwan-Czech Democratic Partners Supply Chain Resilience and Capacity Building Cooperation Plan for 2022-2026. The center is dedicated to cultivating integrated circuit design talent across various fields and fostering the development of the semiconductor industry ecosystem in the Czech Republic.
You can find recordings of ACDRC workshops on our Youtube channel.
This project is a collaborative effort between Taiwanese and Czech organizations, specifically NIAR and CyberSecurityHubcz, which serves as the main execution unit, complemented by a consortium that includes the Czech Technical University, Masaryk University and Brno University of Technology.
Dozens of participants discovered the future of biochips and biomedical chip technologies at a unique international event held in Brno and online from October 21 to 23, 2025. The program brought together researchers from Taiwan, Korea, Japan, and the Czech Republic, who shared the latest advances in diagnostics, wearable electronics, microfluidics, and biochip applications. Check out the lecture recordings and photos from the event.
In September, Taiwanese Foreign Minister Lin Chia-lung visited the ACDRC to learn about current projects in the field of semiconductor technologies and chip development. The center is a key platform for cooperation between Czech and Taiwanese institutions, and its activities support the development of semiconductor technologies and the education of a new generation of experts.
